Google Completes Coral NPU Design as Synaptics Opens Coralboard Sales
Google Research announced completion of its 32-bit Coral NPU architecture on October 20, adding a matrix execution unit alongside a v1.0 IREE/MLIR compiler release. Separately, Synaptics confirmed that its Coralboard SL development board is now generally available through DigiKey.
The open hardware design targets on-device inference in wearables, sensors and robotics. Its new matrix unit accelerates the multiplication operations used by vision encoders and transformer models, reusing weights and activations locally rather than repeatedly moving them through memory.
Google describes the architecture as configurable for up to 1 trillion operations per second, with a target of 10 milliwatts average inference power. Those are design claims and targets, not independently verified performance or battery-life measurements for a shipping board.
Software access has an important caveat
Google says its compiler stack accepts models from JAX, PyTorch and TensorFlow through representations including StableHLO and TOSA. However, the public compiler repository currently describes an end-to-end JAX workflow, other frontends as planned, and host-side simulation rather than physical hardware execution. Developers should distinguish the announced stack from the documented workflow before committing a deployment.
Hardware availability is more concrete
Synaptics says Coralboard SL uses its Astra SL2619 processor with a 1 TOPS Torq/Coral NPU. It also introduced Coralboard SR, based on the SR200 family, with a 400 GOPS accelerator. These products should not be conflated with every feature of Google’s newly completed architecture.
The practical advance is a combination of inspectable compiler code, an open hardware design and purchasable development hardware. The remaining test is how reliably that stack carries developers’ own models from simulation into constrained devices.